Cypress Semiconductor /psoc63 /SRSS /CLK_SELECT

Select source for LFCLK. Note that not all products support all clock sources. Selecting a clock source that is not supported will result in undefined behavior. Writes to this field are ignored unless the WDT is unlocked using WDT_LOCK register.

0 (ILO): ILO - Internal Low-speed Oscillator

1 (WCO): WCO - Watch-Crystal Oscillator. Requires Backup domain to be present and properly configured (including external watch crystal, if used).

2 (ALTLF): ALTLF - Alternate Low-Frequency Clock. Capability is product-specific

3 (PILO): PILO - Precision ILO. If present, it works in DEEPSLEEP and higher modes. Does not work in HIBERNATE mode.

Selects clock PATH, where k=PUMP_SEL. The output of this mux goes to the PUMP_DIV to make PUMPCLK Each product has a specific number of available clock paths. Selecting a path that is not implemented on a product will result in undefined behavior. Note that this is not a glitch free mux.

Division ratio for PUMPCLK. Uses selected PUMP_SEL clock as the source.

0 (NO_DIV): Transparent mode, feed through selected clock source w/o dividing.

1 (DIV_BY_2): Divide selected clock source by 2

2 (DIV_BY_4): Divide selected clock source by 4

3 (DIV_BY_8): Divide selected clock source by 8

4 (DIV_BY_16): Divide selected clock source by 16

Enable the pump clock. PUMP_ENABLE and the PUMP_SEL mux are not glitch-free to minimize side-effects, avoid changing the PUMP_SEL and PUMP_DIV while changing PUMP_ENABLE. To change the settings, do the following:

1. If the pump clock is enabled, write PUMP_ENABLE=0 without changing PUMP_SEL and PUMP_DIV.
2. Change PUMP_SEL and PUMP_DIV to desired settings with PUMP_ENABLE=0.
3. Write PUMP_ENABLE=1 without changing PUMP_SEL and PUMP_DIV.